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ASAHI KASEI
[AK6516C]
AK6516C
SPI bus 256Kbit Serial CMOS EEPROM
Features
Advanced CMOS EEPROM Technology Single Voltage Supply: 1.6V to 5.5V 256Kbits; 32768 x 8 organization SPI Serial Interface Compatible Low Power Consumption 0.8A Max. (Standby mode) High Reliability Endurance: 100K E/W cycles / Address Data Retention: 10 Years Special Features 64 byte Page Write Mode Block Write Protection (Protect 1/4,1/2 or Entire Array) Automatic write cycle time-out with auto-ERASE Software and Hardware controlled Write Protection Self timed Programming Cycle: 5msec. Max. Ideal for Low Density Data Storage Low cost, space saving, 8-pin SOP package
SO
DATA REGISTER
SI
INSTRUCTION REGISTER
R/W AMPS AND AUTO ERASE
INSTRUCTION DECODE, CONTROL AND CLOCK GENERATION
EEPROM
256Kbit 32768 x8
ADD. BUFFERS
DECODER
CS
VPP SW
SCK
HOLD WP
VREF
VPP GENERATOR STATUS REGISTER
Block Diagram
DAP05E-00 -12005/03
ASAHI KASEI
[AK6516C]
General Description
The AK6516C is a 262144-bit, serial, read/write, non-volatile memory device fabricated using an advanced CMOS EEPROM technology. The AK6516C has 262144-bits of memory organized as 32768 registers of 8 bits each. The AK6516C can operate all function under wide operating voltage range: 1.6V to 5.5V. The charge up circuit for high voltage generation needed for write operations is integrated. The AK6516C serial interface is compatible to a SPI bus. The AK6516C has 6 instructions: READ, WRITE, WREN (write enable), WRDI (write disable), RDSR (read status register), and WRSR (write status register). Each instruction is organized by an op-code (8bits), address (16bits), and data (8bits). When input level of CS pin changed from high level to low level, AK6516C can receive instructions. Pin Configurations
AK6516CF
CS SO WP GND 1 2 3 4 8 7 6 5 VCC HOLD SCK SI
8pin SOP
Pin name CS SCK SI SO WP HOLD VCC GND
Functions Chip Select input Serial Clock input Serial Data input Serial Data output Write Protect input Hold input Power Supply Ground
Type of Products Model AK6516CF Memory size 256K bits Temp. Range -40C to +85C VCC 1.6V to 5.5V Package 8pin Plastic SOP
DAP05E-00 -2-
2005/03
ASAHI KASEI
[AK6516C]
Data Transfer An IC that outputs the clock is called "MASTER", an IC that receives the clock is called "SLAVE". The AK6516C operates as a SLAVE. Data is written to the SI pin and read from SO pin. The MSB is transmitted first. After CS pin changes high level to low level, AK6516C receives the first data bit on the SI pin synchronously with the rising edge of the input pulse of serial clock. While CS pin is high level, the data input to the SI pin is don't care and SO pin indicates Hi-Z. All the functions are organized 8 bits of op-code, address, and data. If there is an invalid op-code, the AK6516C ignores the address and data information and SO pin indicates Hi-Z. In order to input new op-code, CS pin should be toggled.
Hold AK6516C has a HOLD pin that can hold the data transfer. When HOLD changes high to low while SCK is low, the data transfer stops. After the HOLD pin changes low to high while SCK is low, the data transfer starts again. While the data transfer is paused, AK6516C ignores the clock on the SCK line.
Write Protect AK6516C has status registers. When the WPEN bit in the status registers is "1", Write Protect function is enabled. When WPEN bit is "1" and WP pin is low level, the status register is protected from write function. When WP pin becomes low level while the WRITE to the status register instruction is written, the AK6516C doesn't accept the instruction. When the WP pin changes low level while the internal programming, the programming function continues. When the WPEN bit is "0", WP pin function is disabled. Even if WP pin is fixed to low level, the WRITE function to the status register can be done. When the WP pin is high level, AK6516C can accept all of READ and WRITE functions.
DAP05E-00 -3-
2005/03
ASAHI KASEI
[AK6516C]
Pin Description CS (Chip Select Input)
When CS changes high level to low level, the AK6516C can receive the instructions. CS should be kept low level while receiving op-code, address and data, and while outputting data. When CS is high level, SO indicate Hi-Z.
SCK (Serial Clock Input)
The SCK clock pin is the synchronous clock input for input/output data.
SI (Serial Data Input)
The op-code, address, and data are written to the SI pin.
SO (Serial Data Output)
The SO pin outputs the data from memory array and status register.
WP (Write Protect Input)
The WP pin controls the write function to the status register. When the WPEN bit in the status register is "0", the function of WP pin becomes disable. Then the status register can be programmable when the WEN bit in the status register is "1". And it does not depend on the status of WP pin. When the WPEN bit is "1", the function of WP is enabled. Then the status register can not be programmable when the WEN bit is "1" and the status of WP pin is low. When the WPEN bit is "1", WP pin is high and WEN bit is "1", AK6516C can accept the WRITE instruction to the status registers. During the instruction input, WP pin should keep high or low level.
HOLD (Hold Input)
The HOLD pin can hold the data transfer. When the HOLD pin changes hi to low while the SCK is low, the data transfer is held. And the transfer starts when the HOLD pin changes low to high while the SCK is low. While the holding the data transfer, AK6516C ignores the clock signal on SCK pin.
DAP05E-00 -4-
2005/03
ASAHI KASEI
[AK6516C]
Function Description
AK6516C has six instructions. The instruction can be input after the CS pin changes high to low. All the instructions are MSB first. Instruction READ WRITE WREN WRDI RDSR WRSR
Op-code 0000 X011 0000 X010 0000 X110 0000 X100 0000 X101 0000 X001
Address X A14-A8 X A14-A8 ----------Bit7-Bit0 (out) Bit7-Bit0 (in) ----------A7-A0 A7-A0
Data D7-D0 (out) D7-D0 (in) ---------------------
Description Read from Memory Array Write to Memory Array Write Enable Write Disable Read Status Register Write Status Register X: don't care
Table 1. Instruction set for AK6516C
WREN (WRITE ENABLE) / WRDI (WRITE DISABLE) The WRITE function can be accepted only in the status of Write Enable. After VCC is applied, AK6516C is in the status of Write Disable. After the function of WRDI, AK6516C cannot accept any programming function.
CS SCK SI SO
0 1 2 3 4 5 6 7
0
0
0
0
X
Hi-Z
1
1
0
X = don't care
WREN
CS SCK SI SO
0 1 2 3 4 5 6 7
0
0
0
0
X
Hi-Z
1
0
0
X = don't care
WRDI
DAP05E-00 -5-
2005/03
ASAHI KASEI
[AK6516C]
RDSR (READ STATUS REGISTER) The RDSR function is used to read the data in the STATUS register. The STATUS register has RDY bit, WEN bit, BP0/BP1 bit and WPEN bit. RDSR function can be used to read READY/BUSY status bit, WRITE ENABLE/DISABLE bit, and BLOCK PROTECT bit. These bits can be set by WRSR function.
CS SCK SI SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
0
0
0
0
Hi-Z
X
1
0
1
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
X = don't care
RDSR
Bit7 WPEN
Bit6 X
Bit5 X
Bit4 X
Bit3 BP1
Bit2 BP0
Bit1 WEN
Bit0 RDY
Register WPEN BP0 / BP1 WEN
Definition WP pin set bit (programmable) See Table 3. Block Protect bit for EEPROM memory array (programmable) See Table 4. WRITE ENABLE / DISABLE bit (READ only) This is set by WREN/WRDI function. WEN=0 : WRITE DISABLE WEN=1 : WRITE ENABLE READY/BUSY status bit (READ only) RDY=0 : READY RDY=1 : BUSY Table 2. Status Register Configuration
RDY
DAP05E-00 -6-
2005/03
ASAHI KASEI
[AK6516C]
WRSR (WRITE STATUS REGISTER) The WRSR instruction can set the Write Protect Block size of the memory array. AK6516C has 4 Blocks of memory arrays. Write Protect Block size can be selected from 1/4, 1/2 and whole memory array. The block, which is set by Write Protect, is Read only. BP0 bit, BP1 bit, and WPEN bit are programmable with EEPROM memory cell bits. The characteristics of those bits (WREN, tE/W, RDSR) are same as the EEPROM memory array.
WP pin function can be set by WPEN (WRITE PROTECT ENABLE) bit which is defined by WRSR function. When WP pin is low level and WPEN bit is "1", the WRITE function to Status register, which has WPEN bit and BP0/BP1 bit, and to Write Disable Block is not performed. Then WRITE function is performed only to the Write enable block. When WP pin is "1" or WPEN bit is "0", then the function of WP pin is disabled and WRITE function to the Status Register is performed. WREN function should be done before WRSR function. And after the Programming function, AK6516C becomes Write Disable status automatically.
CS SCK SI SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0
0
0
0
X
0
0
Hi-Z
1 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
X = don't care
WRSR
WPEN Bit 0 0 1 1 X X
WP Pin X X Low Low High High
WEN Bit 0 1 0 1 0 1
Write Protected Block WRITE Disable WRITE Disable WRITE Disable WRITE Disable WRITE Disable WRITE Disable
Not Protected Block WRITE Disable WRITE Enable WRITE Disable WRITE Enable WRITE Disable WRITE Enable
Status Register WRITE Disable WRITE Enable WRITE Disable WRITE Disable WRITE Disable WRITE Enable
Table 3. WPEN function Status Register bits BP1 BP0 0 0 0 1 1 0 1 1 Write Protected Block none 6000h - 7FFFh 4000h - 7FFFh 0000h - 7FFFh
Table 4. Write Protected Block Size
DAP05E-00 -7-
2005/03
ASAHI KASEI
[AK6516C]
WRITE (WRITE SEQUENCE) WRITE instruction can start the WRITE function to the memory cell array. After CS pin changes high to low, op-code, address and data are input from SI pin. After the instruction input, the internal programming cycle starts when CS pin changes low to high. After the instructions are inputted, CS pin should change low to high after the last data bit (D0) inputs and before next SCK clock rises. Write function can start only at this timing.
AK6516C can indicate the BUSY status by using RDSR instruction and READ the RDY bit (Bit0) in the status register. RDY is "1" indicates AK6516C is in the programming cycle, and RDY is "0" indicates AK6516C is in the READY status. AK6516C outputs the "FF" when RDSR instruction executes during the programming cycle. Only RDSR instruction can be accepted during programming cycle. AK6516C has Page Write mode, which can write the data within 64 bytes with one programming cycle. The input data sent to the shift register within 64 bytes. If the number of bytes exceeded 64, the address counter rolls over to the first address of the page. Internal programming cycle starts after CS pin changes low to high. After WRITE instruction, AK6516C changes to Write Disable status automatically. AK6516C needs WREN instruction before every WRITE instruction. When WRITE instruction is done while AK6516C is in Write Disable status, WRITE instructions are ignored and AK6516C becomes standby status after CS changes to high. AK6516C can accept the next instruction after CS becomes low. WRITE instruction cannot write the data into the address of the protected block.
CS SCK SI SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 22 23 24 25 Data(n) 30 31
0
0
0
0
X
0
1
Hi-Z
0
X A14 A13 A12 A11 A10
A1
A0
D7 D6
D1 D0
CS SCK SI SO
32 33 34 35 36 37 38 39 40 Data(n+63) D0 D7 D6 D5 D4 D3 D2 D1 D0
Data(n+1) D7 D6 D5 D4 D3 D2 D1 D0 D7 Hi-Z
X = don't care
WRITE
DAP05E-00 -8-
2005/03
ASAHI KASEI
[AK6516C]
READ (READ SEQUENCE) After CS changes high to low, the op-code and address are sent on SI pin and the data (D7-D0) read from SO pin. After 1 byte of data output, internal address register is incremented, and the next byte of data is outputted. After READ the data in the highest address, the address register rolls over to the lowest address. After the last bit of the address shift into the register, the input data on SI pin is ignored.
CS SCK SI SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 22 23 24 25 29 30
0
0
0
0
X
0
1
Hi-Z
1
X A14 A13 A12 A11 A10
A1
A0
D7 D6
D2 D1 D0
X = don't care
READ
DAP05E-00 -9-
2005/03
ASAHI KASEI
[AK6516C]
Absolute Maximum Ratings
Parameter Power Supply All Input Voltages with Respect to Ground Ambient Storage Temperature Symbol VCC VIO Tst Min -0.6 -0.6 -65 Max +6.5 VCC+0.6 +150 Unit V V C
Stress above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum conditions for extended periods may affect device reliability.
Recommended Operating Condition
Parameter Power Supply Ambient Operating Temperature Symbol VCC Ta Min 1.6 -40 Max 5.5 +85 Unit V C
DAP05E-00 - 10 -
2005/03
ASAHI KASEI
[AK6516C]
Electrical Characteristics
(1) D.C. ELECTRICAL CHARACTERISTICS (1.6VVCC5.5V, -40CTa85C, unless otherwise specified) Parameter Current Dissipation (WRITE) Current Dissipation (READ) Current Dissipation (Standby) Input High Voltage Input Low Voltage Output High Voltage Symbol ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 ICCS VIH1 VIH2 VIL1 VIL2 VOH1 VOH2 VOH3 Output Low Voltage VOL1 VOL2 VOL3 VOL4 Input Leakage CS, SCK, DI pins WP, HOLD pins Output Leakage SO pin ILI Condition VCC=5.5V,fSCK=10.0MHz, *1 VCC=2.5V,fSCK=5.0MHz, *1 VCC=1.6V,fSCK=2.0MHz, *1 VCC=5.5V,fSCK=10.0MHz, *1 VCC=2.5V,fSCK=5.0MHz, *1 VCC=1.6V,fSCK=2.0MHz, *1 VCC=5.5V *2 2.5VVCC5.5V 1.6VVCC<2.5V 2.5VVCC5.5V 1.6VVCC<2.5V 4.5VVCC5.5V IOH=-2mA 2.5VVCC<4.5V IOH=-0.4mA 1.6VVCC<2.5V IOH=-0.1mA 4.5VVCC5.5V IOL=3.0mA 2.5VVCC<4.5V IOL=1.6mA 2.5VVCC<4.5V IOL=1.0mA 1.6VVCC<2.5V IOL=1.0mA VCC=5.5V, VIN=VCC/GND Min. Max. 2.5 2.0 1.5 2.0 0.4 0.2 0.8 VCC+0.5 VCC+0.5 0.3xVCC 0.2xVCC Unit mA mA mA mA mA mA A V V V V V V V 0.4 0.4 0.2 0.2 1.0 V V V V
A
0.7xVCC 0.8xVCC -0.3 -0.3 VCC-0.5 VCC-0.2 VCC-0.2
ILO
VCC=5.5V, VOUT=VCC/GND
1.0
A
*1: VIN=VIH/VIL, SO=open *2: CS=VCC, VIN=VCC/GND, WP,HOLD=VCC, SO=open
(2) CAPACITANCE (Ta=25C, fSCK=1MHz, VCC=5.0V) Parameter Output Capacitance SO pin Input Capacitance CS, SCK, SI pins Symbol CO VO=0V CIN VIN=0V Condition Min. Max. 8.0 6.0 Unit pF pF
Note: These parameters are not 100% tested. These are the sample value.
DAP05E-00 - 11 2005/03
ASAHI KASEI
[AK6516C]
(3) A.C. ELECTRICAL CHARACTERISTICS 1 (1.6VVCC5.5V, -40CTa85C, unless otherwise specified) Parameter SCK Frequency Symbol fSCK1 fSCK2 fSCK3 tSKSH1 tSKSH2 tSKSH3 tCSS1 tCSS2 tCSS3 tSKW1 tSKW2 tSKW3 tRC tFC tDIS1 tDIS2 tDIS3 tDIH1 tDIH2 tDIH3 tRD tFD tPD1 tPD2 tPD3 tOZ1 tOZ2 tOZ3 tOHD tCSH1 tCSH2 tCSH3 tSKH1 tSKH2 tSKH3 tCS1 tCS2 tCS3 Condition 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V Min. Max. 10.0 5.0 2.0 Unit MHz MHz MHz ns ns ns ns ns ns ns ns ns s s ns ns ns ns ns ns s s ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
SCK Setup Time
CS Setup Time
SCK Pulse Width
20 50 50 40 80 200 40 80 200 2 2
SCK Rise Time SCK Fall Time Data Setup Time
*3 *3
Data Hold Time
4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V
15 20 50 15 30 60 2 2 25 60 100 40 100 200 0 40 80 200 20 50 50 40 100 200
Data Rise Time Data Fall Time SO pin Output Delay
*3 *3
SO pin Hi-Z Time
4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V
SO pin Output Hold Time CS Hold Time
SCK Hold Time
CS High Time
*3: These parameters are not 100% tested. These are the sample value.
DAP05E-00 - 12 -
2005/03
ASAHI KASEI
[AK6516C]
(4) A.C. ELECTRICAL CHARACTERISTICS 2 (1.6VVCC5.5V, -40CTa85C, unless otherwise specified) Parameter HOLD Setup Time 1 Symbol tHFS1 tHFS2 tHFS3 tHFH1 tHFH2 tHFH3 tHRS1 tHRS2 tHRS3 tHRH1 tHRH2 tHRH3 tHOZ1 tHOZ2 tHOZ3 tHPD1 tHPD2 tHPD3 tWR Condition 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V 4.5VVCC5.5V 2.5VVCC<4.5V 1.6VVCC<2.5V Min. 15 30 90 15 30 90 15 30 90 15 30 90 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms
HOLD Hold Time 1
HOLD Setup Time 2
HOLD Hold Time 2
HOLD Low to Output Hi-Z
HOLD High to Output Low-Z
Selftimed Programming Time
25 100 150 25 50 100 5
AC Measurement Condition Load Capacitance CL=100pF
DAP05E-00 - 13 -
2005/03
ASAHI KASEI
[AK6516C]
Synchronous Data Timing
tCS
tCSS
CS
tSKSH tSKW tSKW tRC tFC
SCK
tDIS tDIH tFD tRD
SI SO
0
0
0
Hi-Z
Instruction Input
"H"
CS SCK
"L" tSKW tSKW
tDIS
tDIH
SI SO
A1
A0
tPD tOHD tPD
Hi-Z
D7
D6
Data Output (READ)
DAP05E-00 - 14 -
2005/03
ASAHI KASEI
[AK6516C]
tCS
tCSS
CS
tCSH tSKH tSKSH
SCK SI
tOHD tPD tOZ
0
SO
D1
D0
Hi-Z
Data Output (READ)
CS
tCSH tSKH
SCK SI SO
D2 D1 D0
Hi-Z
Data Input (WRITE)
DAP05E-00 - 15 -
2005/03
ASAHI KASEI
[AK6516C]
"H"
CS SCK
"L" tHFS tHFH tHRS tHRH
tDIS
SI SO HOLD
n+1
tHOZ tHPD Hi-Z
n
n-1
Dn+1
Dn
Dn
Dn-1
Hold
DAP05E-00 - 16 -
2005/03
IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.

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